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	<title>Artificial Neural Network - Revizia istoricului</title>
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	<updated>2026-05-14T09:43:04Z</updated>
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		<title>Lpetrica: Pagină nouă: == Objective ==  Create a PLB peripheral for accelerating artifial neural network (ANN) computation. Test attained acceleration when compared to a processor-only ANN implementation.  ...</title>
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		<updated>2013-03-14T08:21:06Z</updated>

		<summary type="html">&lt;p&gt;Pagină nouă: == Objective ==  Create a PLB peripheral for accelerating artifial neural network (ANN) computation. Test attained acceleration when compared to a processor-only ANN implementation.  ...&lt;/p&gt;
&lt;p&gt;&lt;b&gt;Pagină nouă&lt;/b&gt;&lt;/p&gt;&lt;div&gt;== Objective ==&lt;br /&gt;
&lt;br /&gt;
Create a PLB peripheral for accelerating artifial neural network (ANN) computation. Test attained acceleration when compared to a processor-only ANN implementation.&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
&lt;br /&gt;
http://en.wikipedia.org/wiki/Artificial_neural_network&lt;br /&gt;
http://en.wikipedia.org/wiki/Artificial_neuron&lt;br /&gt;
&lt;br /&gt;
== Requirements ==&lt;br /&gt;
&lt;br /&gt;
# Implement a circuit for computing an artificial neuron output in Verilog (integrated within a user_logic.v peripheral template)&lt;br /&gt;
# Implement a test-bench for the Verilog code&lt;br /&gt;
# Analyze FPGA resource utilization of your circuit for different number of neuron inputs (e.g, 8-16-32-128 integers)&lt;br /&gt;
# Create an XPS system which uses the ANN peripheral and determine what is the maximum size of input arrays on the Nexys-2 Board&lt;br /&gt;
# Implement the system and export it to SDK&lt;br /&gt;
# Create a C code project for processor-only ANN (5-10 neurons), and test speed.&lt;br /&gt;
# Create a C code project for accelerated ANN of the same structure as above, and test speed.&lt;/div&gt;</summary>
		<author><name>Lpetrica</name></author>
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