Counter - Revizia istoricului

Cbira la 26 aprilie 2018 07:04

2018-04-26T07:04:12Z

Cbira: /* Implementing a numerator */

2018-04-11T23:52:21Z

Implementing a numerator

Cbira la 11 aprilie 2018 23:52

2018-04-11T23:52:08Z

Cbira la 11 aprilie 2018 23:51

2018-04-11T23:51:54Z

Cbira la 11 aprilie 2018 23:51

2018-04-11T23:51:19Z

Cbira la 11 aprilie 2018 23:51

2018-04-11T23:51:01Z

Cbira: Pagină nouă: The numerator is a sequential circuit that uses a register to generate a sequence of numbers. The simplest numerator generates a sequence of ascending consecutive numbers. The size...

2018-04-11T23:49:23Z

Pagină nouă: The numerator is a sequential circuit that uses a register to generate a sequence of numbers. The simplest numerator generates a sequence of ascending consecutive numbers. The size...

Pagină nouă

The numerator is a sequential circuit that uses a register to generate a sequence of numbers. The simplest numerator generates a sequence of ascending consecutive numbers. The size of the counter is given by the number of bits of the registers used.

The schema of this device is as follows:

[[File: count.png | Schema of a numerator]]

'''Note:' 'The count can be used as a frequency divider because each bit has a period twice as high as the previous one, and the bit 0 has a double period over the clock signal:

{| class="wikitable"
|- bgcolor="#dddddd" align="center"
|Value || & nbsp; 0 || & nbsp; 1 || & nbsp; 2 || & nbsp; 3 || & nbsp; 4 || & nbsp; 5 || & nbsp; 6 || & nbsp; 7 || & nbsp; 8 || & nbsp; 9 || 10 || 11 || 12 || 13 || 14 || 15 || Waveforms
|- bgcolor="#aa9999" align="center"
|Bit 0 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || [[File: num0.png]]
|- bgcolor="#aa9999" align="center"
|Bit 1 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || 1 || 1 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || 1 || 1 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || 1 || 1 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || 1 || 1 || [[File: num1.png]]
|- bgcolor="#aa9999" align="center"
|Bit 2 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || 1 || 1 || 1 || 1 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || 1 || 1 || 1 || 1 || [[File: num2.png]]
|- bgcolor="#aa9999" align="center"
|Bit 3 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || bgcolor="#ddeeff" | 0 || 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1 || [[File: num3.png]]
|}

== Interface of a counter ==

The interface of a numerator necessarily contains the following ports:
* Clock signal port;
* output signal port, which is even the counting register.

In addition, there may still be:
* Reset port;
* port that controls the counting direction;
* port that stops or starts counting;
* port giving the maximum value the numerator can reach;
* port that commands to load a start value in the counter of the counter and the port on which this value is given;
* etc.

== Implementing a numerator ==

As a sequential circuit, a counter is implemented exclusively with [[Verilog #Blocks always sequential. Non-blocking assignments | always sequential blocks]].

← Versiunea anterioară		Versiunea de la data 26 aprilie 2018 07:04
Linia 1:		Linia 1:
−	The ~~numerator~~ is a sequential circuit that uses a register to generate a sequence of numbers. The simplest numerator generates a sequence of ascending consecutive numbers. The size of the counter is given by the number of bits of the registers used.	+	The counter is a sequential circuit that uses a register to generate a sequence of numbers. The simplest numerator generates a sequence of ascending consecutive numbers. The size of the counter is given by the number of bits of the registers used.

	The schematic of this device is as follows:		The schematic of this device is as follows:

@@ Linia 1: / Linia 1: @@
 The numerator is a sequential circuit that uses a register to generate a sequence of numbers. The simplest numerator generates a sequence of ascending consecutive numbers. The size of the counter is given by the number of bits of the registers used.
-The schema of this device is as follows:
+The schematic of this device is as follows:
 [[File: numarator.png | Block schematic of a counter]]

@@ Linia 3: / Linia 3: @@
 The schema of this device is as follows:
-[[File: count.png | Block schematic of a counter]]
+[[File: numarator.png | Block schematic of a counter]]
 '''Note:''' The count can be used as a frequency divider because each bit has a period twice as high as the previous one, and the bit 0 has a double period over the clock signal:

@@ Linia 5: / Linia 5: @@
 [[File: count.png | Block schematic of a counter]]
-'''Note:' 'The count can be used as a frequency divider because each bit has a period twice as high as the previous one, and the bit 0 has a double period over the clock signal:
+'''Note:''' The count can be used as a frequency divider because each bit has a period twice as high as the previous one, and the bit 0 has a double period over the clock signal:
 {| class="wikitable"

@@ Linia 34: / Linia 34: @@
 * etc.
-== Implementing a numerator ==
+== Implementing a counter ==
 As a sequential circuit, a counter is implemented exclusively with [[Verilog #Blocks always sequential. Non-blocking assignments | always sequential blocks]].

@@ Linia 3: / Linia 3: @@
 The schema of this device is as follows:
-[[File: count.png | Schema of a numerator]]
+[[File: count.png | Block schematic of a counter]]
 '''Note:' 'The count can be used as a frequency divider because each bit has a period twice as high as the previous one, and the bit 0 has a double period over the clock signal:
@@ Linia 9: / Linia 9: @@
 {| class="wikitable"
 |- bgcolor="#dddddd" align="center"
-|Value || & nbsp; 0 || & nbsp; 1 || & nbsp; 2 || & nbsp; 3 || & nbsp; 4 || & nbsp; 5 || & nbsp; 6 || & nbsp; 7 || & nbsp; 8 || & nbsp; 9 || 10 || 11 || 12 || 13 || 14 || 15 || Waveforms
+|Value || &nbsp; 0 || &nbsp; 1 || &nbsp; 2 || &nbsp; 3 || &nbsp; 4 || &nbsp; 5 || &nbsp; 6 || &nbsp; 7 || &nbsp; 8 || &nbsp; 9 || 10 || 11 || 12 || 13 || 14 || 15 || Waveforms
 |- bgcolor="#aa9999" align="center"
 |Bit 0 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || [[File: num0.png]]