<?xml version="1.0"?>
<feed xmlns="http://www.w3.org/2005/Atom" xml:lang="ro">
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	<title>SHA-256 Hash - Revizia istoricului</title>
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	<link rel="alternate" type="text/html" href="http://wiki.dcae.pub.ro/index.php?title=SHA-256_Hash&amp;action=history"/>
	<updated>2026-05-28T05:19:44Z</updated>
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	<generator>MediaWiki 1.35.14</generator>
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		<title>Lpetrica: Pagină nouă: == Objective ==  Create a PLB peripheral for SHA-256 hashing and test attained acceleration when compared to a processor-only SHA-256 implementation. SHA-256 is a variant of the SHA-2...</title>
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		<updated>2013-03-14T07:48:37Z</updated>

		<summary type="html">&lt;p&gt;Pagină nouă: == Objective ==  Create a PLB peripheral for SHA-256 hashing and test attained acceleration when compared to a processor-only SHA-256 implementation. SHA-256 is a variant of the SHA-2...&lt;/p&gt;
&lt;p&gt;&lt;b&gt;Pagină nouă&lt;/b&gt;&lt;/p&gt;&lt;div&gt;== Objective ==&lt;br /&gt;
&lt;br /&gt;
Create a PLB peripheral for SHA-256 hashing and test attained acceleration when compared to a processor-only SHA-256 implementation. SHA-256 is a variant of the SHA-2 family of hash functions&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
&lt;br /&gt;
http://en.wikipedia.org/wiki/Sha-2&lt;br /&gt;
&lt;br /&gt;
== Requirements ==&lt;br /&gt;
&lt;br /&gt;
# Implement a circuit for SHA-256 hash acceleration in Verilog (integrated within a user_logic.v peripheral template)&lt;br /&gt;
# Implement a test-bench for the Verilog code&lt;br /&gt;
# Analyze FPGA resource utilization of your circuit&lt;br /&gt;
# Create an XPS system which uses the SHA-256 peripheral, implement the system and export it to SDK&lt;br /&gt;
# Create a C code project for processor-only SHA-256 hashing and test speed&lt;br /&gt;
# Create a C code project for accelerated SHA-256 hashing and test speed&lt;/div&gt;</summary>
		<author><name>Lpetrica</name></author>
	</entry>
</feed>