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	<title>Sum of Absolute Differences - Revizia istoricului</title>
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		<title>Lpetrica: Pagină nouă: == Objective ==  Create a PLB peripheral for calculating the sum of absolute differences (SAD) on arrays of 32-bit integers. Test attained acceleration when compared to a processor-on...</title>
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		<updated>2013-03-14T08:10:52Z</updated>

		<summary type="html">&lt;p&gt;Pagină nouă: == Objective ==  Create a PLB peripheral for calculating the sum of absolute differences (SAD) on arrays of 32-bit integers. Test attained acceleration when compared to a processor-on...&lt;/p&gt;
&lt;p&gt;&lt;b&gt;Pagină nouă&lt;/b&gt;&lt;/p&gt;&lt;div&gt;== Objective ==&lt;br /&gt;
&lt;br /&gt;
Create a PLB peripheral for calculating the sum of absolute differences (SAD) on arrays of 32-bit integers. Test attained acceleration when compared to a processor-only SAD implementation.&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
&lt;br /&gt;
http://en.wikipedia.org/wiki/L1_norm&lt;br /&gt;
&lt;br /&gt;
== Requirements ==&lt;br /&gt;
&lt;br /&gt;
# Implement a circuit for SAD in Verilog (integrated within a user_logic.v peripheral template)&lt;br /&gt;
# Implement a test-bench for the Verilog code&lt;br /&gt;
# Analyze FPGA resource utilization of your circuit for different sizes of input vector (e.g, 8-16-32-128 integers)&lt;br /&gt;
# Create an XPS system which uses the SAD peripheral and determine what is the maximum size of input arrays on the Nexys-2 Board&lt;br /&gt;
# Implement the system and export it to SDK&lt;br /&gt;
# Create a C code project for processor-only SAD on arrays of 1024 integers, and test speed.&lt;br /&gt;
# Create a C code project for accelerated SAD on arrays of 1024 integers, and test speed.&lt;/div&gt;</summary>
		<author><name>Lpetrica</name></author>
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