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(Pagină nouă: The numerator is a sequential circuit that uses a register to generate a sequence of numbers. The simplest numerator generates a sequence of ascending consecutive numbers. The size...)
 
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The schema of this device is as follows:
The schema of this device is as follows:


[[File: count.png | Schema of a numerator]]
[[File: count.png | Block schematic of a counter]]


'''Note:' 'The count can be used as a frequency divider because each bit has a period twice as high as the previous one, and the bit 0 has a double period over the clock signal:
'''Note:' 'The count can be used as a frequency divider because each bit has a period twice as high as the previous one, and the bit 0 has a double period over the clock signal:
Linia 9: Linia 9:
{| class="wikitable"
{| class="wikitable"
|- bgcolor="#dddddd" align="center"
|- bgcolor="#dddddd" align="center"
|Value || & nbsp; 0 || & nbsp; 1 || & nbsp; 2 || & nbsp; 3 || & nbsp; 4 || & nbsp; 5 || & nbsp; 6 || & nbsp; 7 || & nbsp; 8 || & nbsp; 9 || 10 || 11 || 12 || 13 || 14 || 15 || Waveforms
|Value ||   0 ||   1 ||   2 ||   3 ||   4 ||   5 ||   6 ||   7 ||   8 ||   9 || 10 || 11 || 12 || 13 || 14 || 15 || Waveforms
|- bgcolor="#aa9999" align="center"
|- bgcolor="#aa9999" align="center"
|Bit 0 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || [[File: num0.png]]
|Bit 0 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || bgcolor="#ddeeff" | 0 || 1 || [[File: num0.png]]

Versiunea de la data 11 aprilie 2018 23:51

The numerator is a sequential circuit that uses a register to generate a sequence of numbers. The simplest numerator generates a sequence of ascending consecutive numbers. The size of the counter is given by the number of bits of the registers used.

The schema of this device is as follows:

Block schematic of a counter

Note:' 'The count can be used as a frequency divider because each bit has a period twice as high as the previous one, and the bit 0 has a double period over the clock signal:

Value   0   1   2   3   4   5   6   7   8   9 10 11 12 13 14 15 Waveforms
Bit 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Bit 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
Bit 2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
Bit 3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

Interface of a counter

The interface of a numerator necessarily contains the following ports:

  • Clock signal port;
  • output signal port, which is even the counting register.

In addition, there may still be:

  • Reset port;
  • port that controls the counting direction;
  • port that stops or starts counting;
  • port giving the maximum value the numerator can reach;
  • port that commands to load a start value in the counter of the counter and the port on which this value is given;
  • etc.

Implementing a numerator

As a sequential circuit, a counter is implemented exclusively with always sequential blocks.