DIC Lab Work 4: Diferență între versiuni
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* [[Introduction. Verilog HDL and ModelSim | Boolean logic and numbering systems]] | * [[Introduction. Verilog HDL and ModelSim | Boolean logic and numbering systems]] | ||
* Syntax [[ | * Verilog Syntax [[Verilog_EN]] | ||
* [[Tutorial_Quartus_II | Using the Altera Quartus II Synthesis Program]] | * [[Tutorial_Quartus_II | Using the Altera Quartus II Synthesis Program]] | ||
* [http://wiki.dcae.pub.ro/images/f/fc/Pini_la_care_sunt_conectati_dispozitivele_I-O_pe_placa_experimentala_DE1.pdf List of pins for plate DE1] | * [http://wiki.dcae.pub.ro/images/f/fc/Pini_la_care_sunt_conectati_dispozitivele_I-O_pe_placa_experimentala_DE1.pdf List of pins for plate DE1] | ||
* [http://wiki.dcae.pub.ro/images/f/fc/Pinii_la_care_sunt_conectati_dispozitivele_I-O_pe_placa_experimentala_DE1.pdf List of pins for DE1 board], [http://wiki.dcae.pub.ro/images/3/37/Pin_Assignments_Cyclone_V_.pdf List of pins for DE1-SoC board] | |||
* [[Sequential Circuits]], [[Counter]] | * [[Sequential Circuits]], [[Counter]] | ||
* [[Pulse generator with variable filling factor]] | * [[Pulse generator with variable filling factor]] | ||
Versiunea de la data 26 aprilie 2018 07:03
Notions and Knowledge Required
- Boolean logic and numbering systems
- Verilog Syntax Verilog_EN
- Using the Altera Quartus II Synthesis Program
- List of pins for plate DE1
- List of pins for DE1 board, List of pins for DE1-SoC board
- Sequential Circuits, Counter
- Pulse generator with variable filling factor
Example
Make a circuit that turns on LEDG7 with a variable intensity controlled by a value set by the SW7-SW0 switches using a variable fill factor signal generator based on an 8-bit counter. The numerator will be described as a separate Verilog mode, and will be instantiated in the signal generator.
Exercise
Build a circuit that instantiates 8 variable fill factor signal generators to form a LEDG7-LEDG0 intensity ramp with the following features:
- LEDG0 intensity, denoted I LEDG0 is determined by SW7-SW0
- The LEDG0-7 intensities respect one of the following relationships (the teacher will assign each of the students one of the following relationships):
- #I LEDG0 < I LEDG1 < I LEDG2 < I LEDG3 < I LEDG4 < I LEDG5 < I LEDG6 < I LEDG7
- #I LEDG0 > I LEDG1 < I LEDG2 < I LEDG3 < I LEDG4 < I LEDG5 < I LEDG6 < I LEDG7
- #I LEDG0 > I LEDG1 > I LEDG2 < I LEDG3 < I LEDG4 < I LEDG5 < I LEDG6 < I LEDG7
- #I LEDG0 > I LEDG1 > I LEDG2 > I LEDG3 < I LEDG4 < I LEDG5 < I LEDG6 < I LEDG7
- #I LEDG0 > I LEDG1 > I LEDG2 > I LEDG3 > I LEDG4 < I LEDG5 < I LEDG6 < I LEDG7
- #I LEDG0 > I LEDG1 > I LEDG2 > I LEDG3 > I LEDG4 > I LEDG5 < I LEDG6 < I LEDG7
- #I LEDG0 > I LEDG1 > I LEDG2 > I LEDG3 > I LEDG4 > I LEDG5 > I LEDG6 < I LEDG7
- #I LEDG0 > I LEDG1 > I LEDG2 > I LEDG3 > I LEDG4 > I LEDG5 > I LEDG6 > I LEDG7
Bonus Exercise
Make a circuit that then turns off a led gradually, using a variable fill factor generator.
