Digital Systems Design - Project: Diferență între versiuni

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# [http://wiki.dcae.pub.ro/images/2/23/Golden_model.txt Sequential processor golden model]
 
# [http://wiki.dcae.pub.ro/images/2/23/Golden_model.txt Sequential processor golden model]
 
# [http://wiki.dcae.pub.ro/images/e/e1/Step_by_step_pipeline.txt Step by step design of the pipelined Simple RISC Processor]
 
# [http://wiki.dcae.pub.ro/images/e/e1/Step_by_step_pipeline.txt Step by step design of the pipelined Simple RISC Processor]
# [http://wiki.dcae.pub.ro/images/9/9d/2016_step_by_step_tomasulo1.txt Step by step dynamic scheduling design - A (Parallel execution)]
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# [http://wiki.dcae.pub.ro/images/9/9d/2016_step_by_step_tomasulo1.txt Step by step design of the superscalar Simple RISC - A (Parallel execution)]
  
 
== Resources ==
 
== Resources ==

Versiunea de la data 29 noiembrie 2016 15:22