Artificial Neural Network

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Objective

Create a PLB peripheral for accelerating artifial neural network (ANN) computation. Test attained acceleration when compared to a processor-only ANN implementation.

References

http://en.wikipedia.org/wiki/Artificial_neural_network http://en.wikipedia.org/wiki/Artificial_neuron

Requirements

  1. Implement a circuit for computing an artificial neuron output in Verilog (integrated within a user_logic.v peripheral template)
  2. Implement a test-bench for the Verilog code
  3. Analyze FPGA resource utilization of your circuit for different number of neuron inputs (e.g, 8-16-32-128 integers)
  4. Create an XPS system which uses the ANN peripheral and determine what is the maximum size of input arrays on the Nexys-2 Board
  5. Implement the system and export it to SDK
  6. Create a C code project for processor-only ANN (5-10 neurons), and test speed.
  7. Create a C code project for accelerated ANN of the same structure as above, and test speed.