DES Encryption
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Create a PLB peripheral for DES encryption and test attained acceleration when compared to a processor-only DES implementation.
References
http://en.wikipedia.org/wiki/Data_Encryption_Standard
Requirements
- Implement a circuit for DES acceleration in Verilog (integrated within a user_logic.v peripheral template)
- Implement a test-bench for the Verilog code
- Analyze FPGA resource utilization of your circuit
- Create an XPS system which uses the DES peripheral, implement the system and export it to SDK
- Create a C code project for processor-only DES encryption and test speed
- Create a C code project for accelerated DES encryption and test speed