Gaussian 2D Filter

Objective

Create a PLB peripheral for Gaussian 2D filter computation on square matrices of data . Test attained acceleration when compared to a processor-only implementation.

References

http://homepages.inf.ed.ac.uk/rbf/HIPR2/gsmooth.htm

Requirements

1. Implement a circuit for computing the Gaussian 2D filter in Verilog (integrated within a user_logic.v peripheral template)
2. Implement a test-bench for the Verilog code
3. Analyze FPGA resource utilization of your circuit for different sizes of matrices (e.g, 4x4, 5x5, etc)
4. Create an XPS system which uses the filter peripheral and determine what is the maximum size of matrices on the Nexys-2 Board
5. Implement the system and export it to SDK
6. Create a C code project for processor-only filtering, and test speed.
7. Create a C code project for accelerated filtering, and test speed.