RSA Encryption

Objective

Create a PLB peripheral for RSA encryption and test attained acceleration when compared to a processor-only RSA implementation.

References

http://en.wikipedia.org/wiki/RSA_(algorithm)

Requirements

1. Implement a circuit for RSA encryption in Verilog (integrated within a user_logic.v peripheral template)
2. Implement a test-bench for the Verilog code
3. Analyze FPGA resource utilization of your circuit for various message sizes
4. Create an XPS system which uses the RSA peripheral, implement the system and export it to SDK
5. Create a C code project for processor-only RSA encryption and test speed
6. Create a C code project for accelerated RSA encryption and test speed