Diferență între revizuiri ale paginii „Circuite Integrate Digitale (curs): Călin Bíră”
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M. Morris Mano, Michael D. Ciletti [https://nibmehub.com/opac-service/pdf/read/Digital%20Design%20With%20an%20Introduction%20to%20the%20Verilog%20HDL-%20VHDL-%20and%20SystemVerilog%20by%20M.%20Morris%20R.%20Mano.pdf Digital Design, 6th Edition] | M. Morris Mano, Michael D. Ciletti [https://nibmehub.com/opac-service/pdf/read/Digital%20Design%20With%20an%20Introduction%20to%20the%20Verilog%20HDL-%20VHDL-%20and%20SystemVerilog%20by%20M.%20Morris%20R.%20Mano.pdf Digital Design, 6th Edition] | ||
| − | Calin Bira, [https://wiki.dcae.pub.ro/images/ | + | Calin Bira, [https://wiki.dcae.pub.ro/images/f/f4/DigitalElectronics_WhenHardwareGreetsHardware.pdf Digital Electronics By Example: When Hardware Greets Hardware] |
== Prezentari pdf curs == | == Prezentari pdf curs == | ||
[https://wiki.dcae.pub.ro/images/2/29/Curs_1.pdf Curs 1: Planificare, sisteme digitale, porti logice] | [https://wiki.dcae.pub.ro/images/2/29/Curs_1.pdf Curs 1: Planificare, sisteme digitale, porti logice] | ||
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| + | [https://wiki.dcae.pub.ro/images/6/66/Curs_2_clc.pdf Curs 2: Porti logice implementate CMOS, CLC-uri] | ||
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| + | [https://wiki.dcae.pub.ro/images/8/84/Curs_3_mux.pdf Curs 3: CLC: comparatorul de egalitate, multiplexorul] | ||
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| + | [https://wiki.dcae.pub.ro/images/7/7c/Curs_4_sum.pdf Curs 4: CLC: sumatorul si decodorul] | ||
Versiunea curentă din 14 octombrie 2023 06:55
Bibliografie
Gheorghe Ștefan, Loops & Complexity in Digital Systems. Lecture Notes on Digital Design in the Giga-Gate per Chip Era
M. Morris Mano, Michael D. Ciletti Digital Design, 6th Edition
Calin Bira, Digital Electronics By Example: When Hardware Greets Hardware
Prezentari pdf curs
Curs 1: Planificare, sisteme digitale, porti logice
Curs 2: Porti logice implementate CMOS, CLC-uri
