Diferență între revizuiri ale paginii „Advanced Digital Systems”

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== Overview ==
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* [https://users.dcae.pub.ro/~zhascsi/courses/add/add2.pdf Structured design with verilog]
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* [https://users.dcae.pub.ro/~zhascsi/courses/add/add3.pdf Carry Lookahead Adder - iterative design]
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* [https://users.dcae.pub.ro/~zhascsi/courses/add/add4.pdf Carry Lookahead Adder - recursive design]
  
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The Advanced Digital Systems laboratory introduces concepts like Systems-on-Chip (SoC), offloading engines, peripheral controllers and embedded software. Students will learn to use Xilinx Platform Studio (XPS) and the Software Development Kit (SDK) to create processing systems based on Microblaze and the Digilent Nexys 2 development board, which utilizes a Xilinx Spartan 3 FPGA.
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== Test code for adder ==
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<syntaxhighlight lang="SystemVerilog">
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module test;
  
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== Tutorials ==
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logic [31:0] a;
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logic [31:0] b;
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logic [32:0] s;
  
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The following tutorials demonstrate the use of XPS and SDK in creating hardware platforms for Xilinx FPGAs and developing software for these platforms.
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cla  #(32) dut (.a(a), .b(b), .s(s));
  
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# [[Xilinx Platform Studio]]
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initial begin
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# [[Software Development Kit]]
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    repeat(100) begin
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        #1
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        a  = $random;
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        b  = $random;
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        #1
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        if(s !== a + b)
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            $display("ERROR\n");
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        else
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            $display("OK\n");
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    end
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end
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endmodule
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</syntaxhighlight>
  
 
== Projects ==
 
== Projects ==
  
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# [[PLB External ALU]]
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# [[MD5 Hash]]
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# [[SHA-1 Hash]]
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== Grading ==
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# [[SHA-256 Hash]]
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# [[SHA-512 Hash]]
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All students will need to complete the first project. Afterwards, each student will be assigned one of the remaining projects. The progress made on the assigned project will be used to grade the student.
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# [[AES Encryption]]
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# [[DES Encryption]]
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# [[RSA Encryption]]
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# [[RC4 Stream Cypher]]
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# [[Sorting Network]]
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# [[Sum of Absolute Differences]]
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# [[Sum of Squared Differences]]
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# [[Artificial Neural Network]]
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# [[Gaussian 2D Filter]]

Versiunea curentă din 28 mai 2025 15:13

Test code for adder

module test;

logic [31:0] a;
logic [31:0] b;
logic [32:0] s;

cla   #(32) dut (.a(a), .b(b), .s(s));

initial begin
    repeat(100) begin
        #1
        a  = $random;
        b  = $random;
        #1
        if(s !== a + b)
            $display("ERROR\n");
        else
            $display("OK\n");
    end
end

endmodule

Projects

  1. MD5 Hash
  2. SHA-1 Hash
  3. SHA-256 Hash
  4. SHA-512 Hash
  5. AES Encryption
  6. DES Encryption
  7. RSA Encryption
  8. RC4 Stream Cypher
  9. Sorting Network
  10. Sum of Absolute Differences
  11. Sum of Squared Differences
  12. Artificial Neural Network
  13. Gaussian 2D Filter
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